The amount of processing that can be performed within the size, weight, power, and cost (SWaP-C) envelope of a defense system’s electronics payload has long been a limiting factor of mission capability. To maximize this performance, defense engineers have long used a mix of FPGAs, GPUs, and General-Purpose Processors (GPPs), but recent advances in the Intel® Xeon® system on chips (SoCs) D are rendering these heterogeneous architectures unnecessary while delivering unmatched signal processing power and efficiency.
In this white paper, aerospace and defense engineers will learn:
- How Intel® Xeon® processors D enable performance and flexibility in military electronics payloads
- Best practices for selecting an efficient signal processing module
- Examples of how these solutions can be deployed in a mobile tactical server
