Bringing Data Center Compute to the Tactical Edge

September 15, 2017 Majeed Kamran

Artificial intelligence (AI) and other advanced analytics have great appeal for defense applications. When integrated into signals intelligence (SIGINT) and tactical communications, these technologies can help commanders speed decision cycles and improve mission success rates.

The challenge as always is implementing data-center-class computing within size, weight, and power (SWaP) constraints. Longevity is a concern—data center tech evolves quickly, but defense tech is often deployed for a decade or longer.

Intel® Xeon® Scalable Processors (formerly codenamed "Purley") address both pain points. These chips equip as many as 28 cores per socket, yet offer thermal design power (TDP) ratings as low as 80 W—enabling the chips to be used in SWaP-constrained settings like tactical edge computing.

What's more, the new processors and their accompanying C620 Series Chipsets (formerly codenamed "Lewisburg") are supported by 10-year use case reliability and 15-year production availability. This makes them a solid choice for long-term deployments.

New Instructions Give Signal Processing a Boost

The new processors offer a range of important upgrades that boost performance while keeping TDP constrained. Most notable is the Intel® AVX-512 instruction set extension. Intel® AVX-512 math units double throughput for demanding tasks like AI/deep learning workloads, image and audio/video processing, and cryptography.

“Tactical systems have traditionally used the power of the CPU itself without relying on the added capability of vector units,” says Rob Persons, Senior Presales Technical Architect at Artesyn Embedded Technologies. “Therefore, as tactical systems try to do more in a smaller package, the capabilities of vector units will become more interesting.”

Persons also notes that a significant jump in memory bandwidth helps support the added performance of the Intel® AVX-512 vector units. Here, the Intel® Xeon® Scalable Processors double system memory per socket over earlier generations to 1.5 Terabytes in support of memory-bound applications.

Together, these enhancements yield a 2.2X improvement in LINPACK library execution. The LINPACK benchmark measures the computation of numerical linear algebra expressions, such as those used in signal processing applications.

Chipset Offloads Encryption

The Intel® C620 Series Chipsets further enhance performance with Intel® QuickAssist Technology (Intel® QAT). This feature offloads data encryption from the processor, helping defense network engineers implement IoT-style sensor data communications without adding the burden of cryptographic workloads to the host processor.

The C620 Series Chipsets also incorporate Intel® Key Protection Technology (Intel® KPT) to ensure encrypted end-to-end communications (Figure 1). Intel® KPT provides secure key generation and storage, secure key provisioning, launch time key sharing, and runtime usage at near-zero encryption overhead to the host processor.

Figure 1. Intel® Key Protection Technology (Intel® KPT) helps provide secure end-to-end communications. (Source: Intel)

It also helps protect hardware-based security keys from types of electronic warfare, including:

  • Network attacks
  • Software and firmware (BIOS) attacks
  • Probing (hardware)

The combination of Intel® KPT and Intel® QAT reduces the need for expensive hardware security modules (HSMs).

As shown in Figure 2, these features can be extracted from the C620 Series Chipsets through 4×10 GbE ports, one 16-lane PCIe Gen 3 link, and a direct memory interface (DMI).

Figure 2. The Intel® C620 Series chipsets embed Intel® QAT to reduce encryption overhead. (Source: Intel)

“The new 10 Gb communications channels of the PCH along with Intel® QAT could be used to create a gateway for encrypted data away from the system,” Persons explains. “The new feature set could add some additional capabilities, enhancing the security of data as it leaves the system.”

The Modular Open Systems Approach

Of course, defense engineers must adhere to a modular open systems approach (MOSA) to take full advantage of the new processors. MOSA compliance helps ensure an open, competitive ecosystem of electronic components, boards, and systems to prevent vendor lock-in.

ATCA blades such as the ATCA-7540 from Artesyn are a good example of this approach. These network blades adhere to MOSA guidelines and are already available with the new processors. For example, ATCA-7540 features two Intel® Xeon® Scalable Processor sockets (Figure 3). The board is optimized for airborne and shipborne datacenters, ground control stations, network data analytics, and command, control, communications, computers, intelligence, surveillance, and reconnaissance (C4ISR) operations.

Figure 3. The ATCA-7540 server blade is designed to serve compute-intensive defense communications. (Source: Artesyn Embedded Technologies)

The 48 PCIe lanes available on Intel® Xeon® Scalable Processors support the ATCA-7540's high-bandwidth backplane connections, high-performance front-panel I/O, and carrier module zones (Figure 4).

Figure 4. ATCA-7540 blade benefits from the optimized memory and I/O design of Intel® Xeon® Scalable Processors. (Source: Artesyn Embedded Technologies)

With the ATCA-7540, powerful multi-socket signal processing systems can be deployed in a compact 8U ATCA server cabinet. In addition, this architecture allows operators to hot-swap replacement boards without having to update the system software or infrastructure.

Purley Boosts ATCA Longevity

Military system refreshes are mandatory to take advantage of emerging technologies such as AI and IoT that can change outcomes on the battlefield. But these must be conducted with SWaP and longevity in mind.

The combination of Intel® Xeon® Scalable Processors and the ATCA standard check these boxes for defense system designers. Commanders can now harness the power of a data center at the tactical edge.

About the Author

Majeed Kamran

Majeed Ahmad is former Editor-in-Chief of EE Times Asia, a sister publication of EE Times. Moreover, as the Editor-in-Chief at Global Sources, a Hong Kong-based trade and technology publishing house, he spearheaded magazines related to electronic components, consumer electronics, and computer, security and telecom products. Majeed is a journalist with an engineering background and two decades of experience in writing, editing and acquiring technical content. He is also author of six books on electronics: Smartphone, Nokia’s Smartphone Problem and The Next Web of 50 Billion Devices, Mobile Commerce 2.0, Age of Mobile Data, and Essential 4G Guide.

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